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1)
RT2009 ATCA
Workshop Program , IHEP, Beijing, May 10 2009
Organizers : Ray
Larsen (SLAC) and Zhen’An Liu (IHEP)
Location: Main Building C305,
IHEP
|
Sunday
May 10, 2009 |
Presentation |
Speaker |
Notes |
|
0830-0900 |
Workshop
Welcome & Introduction to Program |
Dr. Liu
Zhen’An, IHEP |
Review
of program agenda of 3rd xTCA for
Physics Workshop |
|
0900-1015 |
Overview
of xTCA Hardware Standard Platforms |
Mr. Greg
Chao, Pentair-Schroff, China Rep.
|
Basics
of ATCA, µTCA system hardware including. IPMI,
with Pentair-Schroff product illustrations |
|
1015-1045 |
Coffee
Break – Exhibit Area
|
|
|
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1045-1200 |
Overview
of xTCA Software Standards Development |
Dr.
Artem Kazakov, KEK/ SOKENDAI
|
Basics
of HA software, auto-failover, interoperability,
physics application developments, standards
development organization support |
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1200-1300 |
Lunch |
|
|
|
1300-1330 |
Applications Talk 1 – ATCA DAQ Application |
Dr. Liu
Zhen’An, Xu Hao et al, IHEP |
Physics
experiment illustration of ATCA, RTM |
|
1330-1400 |
Applications Talk 2- µTCA Shelf Management
|
Mr.
Jiping Cao
Performance Technologies China Representative |
µTCA
product portal management software and shelf
management system using PT product |
|
1400-1430 |
Coffee
Break – Exhibit Area
|
|
|
|
1430-1500 |
Applications Talk 3 –Accelerator LLRF Controls
Application |
Dr. S.
Simrock et al, DESY, Video Presentation
|
Accelerator Controls illustration of ATCA, AMC,
RTM |
|
1500-1530 |
Applications Talk 4 – µTCA Products for
Industrial Apps |
Mr.
James Jiang, Beijing Fountain Microsystems,
representing NAT |
Presentation of µTCA product line developments
of NAT. |
|
1530-1600 |
Report
on PICMG xTCA for Physics Specifications
Committee and Working Groups |
Ray
Larsen, SLAC |
Status
of efforts to extend xTCA to physics
applications with emphasis on module
interoperability |
|
1600-1700 |
Closing
& Exhibits Tour |
Dr. Liu
Zhen’An, IHEP |
Information on distribution of talks, next
workshop |
2) SHORT
COURSE : FPGA structure, programming principals and
applications
Organizer:
Stefan Ritt (PSI)
Lecturers : Marc
André Tétrault (U. Sherbrooke) and Jin-Yuan Wu (FNAL)
Location: Main Building A415
Sunday May
10, 2009 - 8 :30 – 12 :00
FPGAs is an
attractive solution for systems that require very fast
data processing combined with reprogramability and/or
low production volume. Their parallel nature and
specialized embedded blocks make them very suitable for
on the fly, real time signal processing. However, it is
no simple task to write code that will run at the FPGA's
full potential. This requires minimal understanding of
both the FPGA's basic architecture and of the algorithms
to be placed in the logic fabric. Only then can
strategies such as pipelining and time sharing can be
properly applied. FPGAs are also used to implement a
wide range of functions that are traditionally expected
to be handled by dedicated parts.
This short
course will begin with a review of the basic notions
that novice and intermediate FPGA programmers should be
aware of, such as primitive cell structures and timing
closure. Then different design approaches will be
discussed and demonstrated through real-world
applications, with highlights on pipelining, up-clocking
and resource time sharing. Pipelining consumes more
logic space, but can significantly increase the system's
processing throughput, while time sharing reduces
resource consumption and idle time.
In the second
half of the short course, several FPGA design examples (
ADC,TDC …) used in accelerator instrumentation and high
energy physics will be reviewed. These examples serve
both as illustrations of the strategies discussed
earlier and as handy references for future design jobs.
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